AMD sets its sights on Taiwan: $10 billion for next-generation AI

The American semiconductor manufacturer AMD will allocate more than $10 billion to develop its manufacturing ecosystem in Taiwan in order to meet the growing demands of the artificial intelligence market. This strategic investment will accelerate the development of advanced packaging technologies and the production of next-generation processors, which are essential for modern data centers.

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AMD is taking a massive strategic step forward. The US tech giant has announced plans to invest more than $10 billion in its Taiwanese manufacturing ecosystem. The move is crucial to the development of next-generation AI infrastructure and is a direct attempt to strengthen the company’s position against global competitors.

AMD’s initiative focuses on two key areas: expanding strategic partnerships and leapfrogging advanced chip-packaging manufacturing capacity. In the architecture of modern AI chips, it is the advanced packaging that is becoming a major bottleneck, determining the performance and supply of computing systems. AMD intends to solve this problem by, among other things, developing 2.5D bridge technology based on the EFB architecture, which is expected to significantly improve data throughput and energy efficiency. Furthermore, the company is working on innovative panel interconnects to optimise volume production costs.

These innovations will find direct application in the upcoming AMD Helios platform. At its heart will be sixth-generation AMD EPYC server processors codenamed ‘Venice’ and AMD Instinct MI450X accelerators. The platform’s market launch, in collaboration with global partners, is planned for the second half of 2026. The chips will be manufactured on TSMC’s advanced 2nm process, with AMD also planning to expand production in the future with its US-based Taiwanese partner’s Arizona factory.

However, the company’s strategy goes beyond pure computing power alone. In response to the growing energy demands of artificial intelligence systems, AMD is also developing the ‘Verano’ family of processors. This will be a price-performance-optimised variant of the EPYC generation, supporting energy-efficient LPDDR memory and using advanced packaging technologies such as SoIC-X and CoWoS-L.

The success of this costly plan relies heavily on deep integration with TSMC. The chairman of the Taiwanese giant, Dr C.C. Wei, stressed that the introduction of ‘Venice’ chips into 2nm lithography production is a milestone for the industry. For AMD, it is a key opportunity for market reshuffling: if the company can successfully scale production of the new architecture, it will gain a powerful asset in the battle for the lucrative data centre market.

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